1. Field of the Invention
This invention relates to circuitry for converting a PC beep signal into a digital signal for use in an audio codec. More particularly, it relates to the simplification of the architecture in an audio codec surrounding the digitization and summation of a PC beep signal with other audio sources.
2. Background of Related Art
Efficient and inexpensive digitization of telephone grade audio has been accomplished for many years by an integrated device known as a "codec." A codec (short for COder-DECoder) is an integrated circuit or other electronic device which combines the circuits needed to convert analog signals to and from Pulse Code Modulation (PCM) digital signals.
Early codecs converted analog signals at an 8 KHz rate into 8-bit PCM for use in telephony. More recently, the efficiency and low cost advantages of codecs have been expanded to convert analog signals at a 48 KHz sampling rate into 16-bit stereo (and even up to 20-bit stereo) for higher quality use beyond that required for telephony. With higher quality audio capability, today's codecs find practical application in consumer stereo equipment including personal computers (PCs), CD players, modems and digital speakers.
Improved signal-to-noise (S/N) ratios have been achieved largely by separating the conventional codec into two individual sub-systems and/or two separate integrated circuits (ICs): a controller sub-system handling primarily the digital interface to a host processor, and an analog sub-system handling primarily the interface to, mixing and conversion of analog signals. This split digital/analog architecture has been documented most recently as the "Audio Codec '97 Component Specification", Revision 1.03, Sep. 15, 1996 ("the AC '97 specification"). The AC '97 specification in its entirety is expressly incorporated herein by reference.
With the development of codecs for these more sophisticated and generalized purposes came the need to not only accommodate many types of audio sources, but also the need to reduce the cost and the power consumption of the audio codec. The AC '97 specification includes a significant amount of flexibility intended to capture a large market by satisfying many consumer-related audio needs. For instance, the conventional AC analog sub-system includes interface capability to accept input from multiple audio sources and to digitally mix the audio signals from those multiple audio sources.
FIG. 4 is a generalized block diagram of a conventional splitarchitecture audio codec conforming to the AC '97 specification. Audio codecs conforming to the AC '97 specification accommodate audio sources from CD players, auxiliary devices such as stereo equipment, and/or PCs. The intention of routing the PC beep signal through the audio mixer of the split-architecture audio codec is to eliminate the requirement for an onboard speaker or piezoelectric device when the audio codec is used in a PC.
As shown in FIG. 4, the audio from a CD player is amplified by a pre-amplifier 400 for volume control, converted into a digital signal by analog-to-digital converter (A/D) 406, and digitally summed with digital signals from other audio sources in digital scaler/summer 412. Likewise, an auxiliary audio source such as a stereo tuner is amplified to the proper level in pre-amplifier 402, converted into a digital signal by A/D 408, and scaled and summed with the digital signals from other audio sources in digital scaler/summer 412. According to the AC '97 specification, a "beep" signal from a PC is amplified by pre-amplifier 404, converted into a digital signal in A/D 410, and summed with the digital signals from other audio sources in digital scaler/summer 412.
The PC beep signal is typically a two-level signal based on logic levels, e.g., 0 and 5 volts, as shown in FIG. 5. In conventional PCs, the PC beep signal drives a piezoelectric transducer or a speaker at selected frequencies to provide informative "beeps" to the user of the PC. When the audio codec is used inside or in conjunction with a PC, it is useful to include the PC beep signal along with other audio signals so that the user can listen to a single audio source, i.e., set of speakers. The frequency of the PC beep is controlled by repetition rate, while its amplitude is controlled by duty cycle. Tone power of the PC beep is adjusted by an adjustment of the duty cycle. The PC beep signal however, is fixed at a logic level, e.g., 0 or 5 volts.
The A/D converter 410 will output only two encoded digital sample values. One digital sample value is output when the PC beep signal is at a logic HIGH level, and another digital sample value is output when the PC beep signal is at a logic LOW level. Thus, the full range of the conventional PC beep pre-amplifier 404 and PC beep A/D converter 410 (FIG. 4) is essentially wasted. As a result, power usage of the PC beep pre-amplifier 404 and PC beep A/D converter 410 is wasted, and the design of the audio codec is unnecessarily complicated.